Distinguished Workshop on Analog IC Design
2015/06/09



Date & Time:

 

15 -16 June  2015

   

11:00am  - 12:30pm  and 2:30pm - 6:15pm on 15 June 2015

   

09:00am  - 12:15pm on 16 June 2015

Speaker:

 

Professor Behzad Razavi, Professor of electrical engineering at  University of California, Los Angeles, USA

Venue:

   

Library Auditorium,  G/F of UM Wu Yee Sun Library (E2)

Language:

 

English

     

Target Audience:

 

All are welcome

     
                       
   

Brief introduction of the Invited Speaker:

                       
   

Professor Behzad Razavi, Professor of electrical engineering at University of California, Los Angeles, USA

   

 Professor Razavi has served as an IEEE Distinguished Lecturer and is a Fellow of IEEE. He received the 2012 IEEE Donald Pederson Award in Solid-State Circuits. .

   

 Professor Razavi is the author of    Principles of Data Conversion System Design (IEEE Press, 1995), RF Microelectronics    (Prentice Hall, 1998, 2012) (translated to Chinese, Japanese, and Korean), Design of Analog CMOS Integrated  Circuits (McGraw-Hill, 2001) (translated to Chinese, Japanese, and Korean),  Design of Integrated  Circuits for Optical Communications (McGraw-Hill, 2003), and Fundamentals of    Microelectronics (Wiley 2006) (translated to Korean and Portuguese), and the editor of Monolithic Phase-Locked Loops and Clock  Recovery Circuits (IEEE Press, 1996), and Phase-Locking in High-Performance Systems    (IEEE Press, 2003).

                       
   

Distinguished Workshop on Analog IC Design

15-Jun-15

                     
                       

11:00 - 11:15

 

Refreshment

                       

11:15 - 12:30

 

 Session1:  A 12-Bit 200-MS/s 3.4 mW ADC

                       

14:30  - 15:40

 

Session 2 : Channel Selection at RF

                       

15:40  - 15:50

 

Refreshement

                       

15:50  - 17:00

 

Session 3: RF Synthesis without Inductors

                       

17:00  - 18:15

 

Session 4: Interactive Poster Session

                       
                       

16-Jun-15

                     
                       

09:00  - 10:30

 

Session 5:  All-Digital PLLs - Part I

                       

10:30 - 10:45 

 

Refreshment

                       

10:45 - 12:15

 

Session 6:  All-Digital PLLs - Part II

                       
   

The lecture is open to the public

   

For enquiry:     State Key Laboratory of Analog and Mixed-Signal VLSI

   

Tel. (853) 8822-8796 ;  http://www.amsv.umac.mo ; amsv.enquiry@umac.mo


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